ASIC Packaging Signal/Power Integrity Hardware Engineering Technical Lead
Cisco
Job Description
The application window is expected to close on: 09/25/2026<p><b>Job posting may be removed earlier if the position is filled or if a sufficient number of applications are received</b>.</p><p>This Hardware Engineering position is located in San Jose, CA, and is open to remote applicants residing within the United States.</p><h3>Meet the Team</h3><p>The Common Hardware Group (CHG) creates innovative hardware platforms central to the AI era, powering <a href="https://himalayas.app/companies/cisco">Cisco</a>’s core Switching, Routing, and Wireless products for organizations globally. Our innovations in silicon, optics, and hardware platforms—like Silicon One—are shaping the technology industry. We're a global team of creative experts, bringing our unique backgrounds and bold ideas to push boundaries and help each other grow. Because full product development—from design to qualification to production—is within our team, we’re able to think differently, experiment more, and work quickly. Join us to power the future of the digital world.</p><p><a href="https://himalayas.app/companies/cisco">Cisco</a> Silicon One (#<a href="https://himalayas.app/companies/cisco">Cisco</a>SiliconOne) is a business organization with a long track record of building complex and high-performance Silicon ASICs. Our silicon devices drive the world’s most complex networks and carry over 90% of IP traffic. <a href="https://himalayas.app/companies/cisco">Cisco</a> Silicon One is the only unifying silicon architecture in the market that enables customers to deploy the best-of-breed silicon from Top of Rack (TOR) switches all the way through web scale data centers and across service provider, enterprise networks, and data centers with a fully unified routing and switching portfolio. </p><p>We are a highly specialized ASIC team with experts in all aspects of advanced IC package design and heterogeneous system integration. Our substrates use the latest 2.5D fanout technologies for large-scale integration, using the latest signaling and data transfer technologies. Come join us and take part in shaping <a href="https://himalayas.app/companies/cisco">Cisco</a>'s ground-breaking solutions by designing, developing and testing some of the most complex ASICs being developed in the industry!</p><h3><br>Your Impact</h3><p>We are seeking a highly qualified Signal and Power Integrity Technical Lead to help us develop our next generation ASIC packaging to help define, design and verify ASIC packaging to be deployed in a range of <a href="https://himalayas.app/companies/cisco">Cisco</a> platforms. </p><ul><li><p>Develop, document, and implement design rules for ultra-high-speed signaling, ensuring power, performance, and area goals are met for products.</p></li><li><p>Analyze substrate signal integrity (SI) and power integrity (PI), providing feedback and collaborating with the layout team to develop optimal solutions across interposer, substrate, and PCB.</p></li><li><p>Design, document, and deve